Packages for semiconductor die

ABSTRACT

A ball grid array assembly includes a package cover that encapsulates a die and a portion of a substrate to which the die is attached, including an edge of the substrate. Encapsulation of the substrate edge by the cover reduces penetration of moisture or other contaminants into the substrate. The cover includes a rib that extends to contact a circuit board to which the ball grid array assembly is connected. With such a rib, planarity between the circuit board and the substrate is maintained during soldering.

TECHNICAL FIELD

[0001] The disclosure pertains to packages for semiconductor die andmethods of packaging semiconductor die.

BACKGROUND

[0002] Semiconductor fabrication processes have been developed thatpermit the integration of very large numbers of transistors, diodes, andother circuit elements onto a single integrated circuit. Such integratedcircuits generally require large numbers of electrical connections toreceive inputs and supply outputs. Because these integrated circuits aregenerally very small, the required input/output electrical connectionson the integrated circuit are both numerous and densely spaced.

[0003] A significant problem in the use of integrated circuits ispackaging the integrated circuit in such a way as to electricallyconnect to the many, densely spaced input/output electrical connections.If the input/output electrical connections must be spread out to permitelectrical connections to other integrated circuits, other circuits orcircuit components such as printed circuit boards, then much of theadvantage of integrated circuit miniaturization is lost.

[0004] One method of packaging integrated circuits for electricalconnection to a printed circuit board is the so-called ball grid array(BGA) package. A BGA package includes a semiconductor die (an integratedcircuit) that is attached to a substrate. Electrical connections aremade from the die to the substrate with bond wires that are attached tobond pads provided on the die and the substrate. The bond pads on thesubstrate are electrically connected to an array of solder balls orbumps, and these solder balls are used to bond and make electricalconnection to the printed circuit board. BGA packages are described in,for example, Tsuji et al., U.S. Pat. No. 5,930,603, Tsunoda et al., U.S.Pat. No. 5,914,531, and Tsuji et al., U.S. Pat. No. 5,293,072.

[0005] Not only are BGA packages more compact than other packages, BGApackaged devices generally have superior thermal and electricalproperties. The solder balls provide an excellent thermal path for theremoval of heat from the semiconductor die as well as providing lowresistance, low inductance electrical connections.

[0006] BGA packages have several drawbacks. For example, soldering a BGApackaged device to a printed circuit board can require precise solderingprocess control. Accordingly, improved packages, packaging methods, andpackaging apparatus are needed.

SUMMARY OF THE INVENTION

[0007] Packaged semiconductor die are provided that include asemiconductor die attached to a first major surface of a substrate. Oneor more solder bumps or balls are attached to a second major surface ofthe substrate opposite to the first major surface. A substrate edgeextends between the first and second major surfaces. An elongated ribprojects outwardly from the second major surface and extends along atleast part of a perimeter portion of the second surface. In someembodiments, the rib overlaps and encapsulates at least a portion of thesubstrate edge. The rib may comprise a band or frame that borders theentire perimeter of the second surface of the substrate. The field orspace within the frame may comprise a void or recess bounded by theframe and second surface of the substrate and which is void of materialexcept for solder bumps within the recess.

[0008] In additional embodiments, packaged die include a package coverthat encapsulates at least a perimeter portion of the first surface ofthe substrate and the semiconductor die. Some embodiments includes bondwires that electrically connect the semiconductor die to the substrate,and the package cover encapsulates the bond wire. In other embodiments,the packaged semiconductor die includes an adhesive layer that bonds thesemiconductor die to the first surface of the substrate.

[0009] Integrated circuit assemblies are provided that include asemiconductor die that is attached and electrically connected to asubstrate. Solder bumps electrically connect the substrate to a circuitboard and a package cover encapsulates the semiconductor die and atleast a portion of an edge of the substrate. The package cover includesa rib that extends to contact the circuit board.

[0010] Mold sets are provided for molding a package for at least one diebonded to a substrate. The mold sets include an upper mold and a lowermold. The upper mold defines a package cover for encapsulating the dieand a portion of a surface of the substrate to which the die is bondedwhile the lower mold defines a rib that extends from a surface of thesubstrate. In a specific embodiment, the upper mold and lower molddefine the package cover and the rib so that a portion of the substrateedge is encapsulated by either the package cover or the rib, or both thepackage cover and the rib. In additional embodiments, the upper mold andthe lower mold define package covers and ribs for a plurality of diebonded to the substrate such as a substrate strip.

[0011] Methods of reducing moisture penetration into a circuit assemblythat includes a substrate and a circuit board are provided that includecovering at least a portion of an edge of a substrate with anencapsulant. In addition, a rib may be formed that covers at least aportion of a first surface of the substrate and extends from a secondsurface of the substrate and contacts the circuit board. In furtherembodiments, the circuit assembly includes a die and the die is coveredwith the encapsulant.

[0012] Methods of soldering a substrate provided with solder bumps to acircuit board are provided. The methods include contacting the circuitboard with the solder bumps and heating the solder bumps so that thesolder bumps reflow, thereby connecting the solder bumps to the circuitboard. A projecting stop is situated along at least a portion of theperiphery to maintain a separation between the substrate and the circuitboard as the solder bumps reflow. In some embodiments, the solder bumpsare heated so that the stop contacts the circuit board and the stop isbonded to the circuit board and the substrate. The stop may comprise anelongated rib which projects from the surface of the substratecontaining the bumps. Typically an elongated portion of the stop ispositioned along each side of the periphery of the substrate to maintainthe desired spacing.

[0013] Methods of packaging a die are provided that include bonding thedie to a first surface of a substrate and attaching one or more solderbumps to a second surface of the substrate. In addition, anencapsulating layer is provided that encapsulates the die, wherein theencapsulating layer includes a rib that encapsulates at least aperimeter portion of the second surface of the substrate. In someembodiments, the encapsulating layer encapsulates at least a portion ofthe first surface of the substrate and the rib is defined with a mold.In other embodiments, the rib has a thickness that is at least as largeas a thickness of the solder bumps.

[0014] Methods of attaching a substrate to a circuit board are providedthat include providing a rib that covers a perimeter portion of asurface of a substrate and electrically connecting the substrate to thecircuit board so that the separation of the substrate and the circuitboard is defined by the rib.

[0015] Methods of attaching a ball grid array packaged die to a circuitboard are provided that include providing a support rib at a perimeterof a surface of the ball grid array packaged die and heating thepackaged die to reflow solder bumps provided at the surface.

[0016] Methods of making a package for a die mounted to a substrate areprovided that include contacting a first surface of the substrate with afirst mold and contacting the first mold with a second mold. Anencapsulant is injected into a cavity defined by the first mold and thesecond mold, wherein one of the first mold and the second mold define acavity for a rib.

[0017] The invention is directed to novel and non-obvious aspects ofthis disclosure, both individually and in combination as set forth inthe claims below.

BRIEF DESCRIPTION OF THE DRAWINGS

[0018]FIG. 1 is a sectional view of one form of a ball grid array (BGA)assembly that is soldered to a printed circuit board.

[0019]FIG. 2 is a plan view of the BGA assembly of FIG. 1, without theprinted circuit board.

[0020]FIG. 3 is a sectional view of a BGA assembly that incorporates anencapsulating layer in the ball grid array area of the assembly.

[0021]FIG. 4 illustrates molds for producing one form of a package coverand a rib for a die bonded to a substrate.

[0022]FIG. 5A is a perspective view illustrating a plurality of diebonded to a substrate strip.

[0023]FIG. 5B is a sectional view of the substrate strip and die of FIG.5A.

[0024]FIG. 5C is another sectional view of the substrate strip and thedie of FIG. 5A.

[0025]FIG. 5D is a sectional view of the substrate strip and the die ofFIG. 5A with solder bumps attached.

DETAILED DESCRIPTION

[0026]FIG. 1 illustrates a ball grid array (BGA) assembly 100 that isshown soldered to a printed circuit board (PCB) 110. FIG. 2 is a planview of the BGA assembly 100, without the PCB 110. The BGA assembly 100includes a semiconductor die 102, such as an integrated circuit, that ismounted to a substrate 104, such as by being adhesively bonded theretowith a tape adhesive 105, an epoxy, or other adhesive. One or more bondwires 106 or other interconnect electrically connect the semiconductordie 102 to bond pads 107 on the substrate 104. The substrate 104generally defines one or more circuit patterns 108 that electricallyconnect the semiconductor die 102 to solder balls or bumps 114 attachedto a surface 109 of the substrate 104 via the bond wires 106. The solderballs or bumps 114 are typically attached to the substrate 104 at bondpads 138. The PCB 110 is attached to the substrate 104 by the solderballs 114, completing the electrical connection of the semiconductor die102 to the PCB 110.

[0027] The substrate 104 may be a multilayer material that includeslayers of conducting and insulating materials. Representative materialsinclude insulating circuit board base materials such as polyimide, glassepoxy, and glass fiber layers, as well as conducting layers such ascopper, and solder resist layers. The illustrated substrate includesfirst and second major opposed surfaces 111, 109 with a substrate edge122 extending between the major surfaces. In FIG. 1, the die 102 ismounted to the first or upper major surface 111 of the substrate and thesolder balls project outwardly from the second or lower major surface109 in a direction away from the first surface.

[0028] The semiconductor die 102 and the bond wires 106 in theillustrated embodiment are encapsulated by a package cover 120. Cover120 may be made of a cured liquid encapsulant, a cured epoxy, a moldedplastic, a cured liquid resin, or other material. The package cover 120in the examples shown also encapsulates at least a portion of, and inthis case the entire perimeter region 126 of the upper major substratesurface 111 as well as the substrate edge 122, and a perimeter region128 of the lower major surface 111 of the substrate 104. The packagecover 120 includes a rib 130 that extends from the surface 109 to thePCB 110. The rib 130 projects outwardly from surface 109 in the samedirection as the solder balls 114. The rib 130 is preferably elongatedand extends along at least a portion of the perimeter of the substrate.The rib may comprise a band or frame which extends along the entireperiphery or perimeter of the substrate. In this case, the package cover120, the PCB 110, and the surface 109 form a cavity 132 that enclosesthe solder balls 114. That is, the solder balls in this case arepositioned within a field bordered by the rib 130 with the cavity 132being void of material between at least a plurality of the balls anddesirably between all of the balls.

[0029] The BGA assembly 100 can be bonded to the PCB 110 with asoldering process. The BGA assembly 100 is placed in contact with thePCB 110 so that the solder balls 114 contact bond pads 140 on the PCB110. The BGA assembly 100 and the PCB 110 are arranged so that gravityor other force presses the BGA assembly 100 and the PCB 110 together.The BGA assembly 100 and the PCB 110 are then heated, generally in anoven or on a hot plate, so that the solder balls 114 solder to the bondpads 140.

[0030] The soldering process can be characterized by a time-temperatureexposure profile that specifies temperatures and the durations for whichthe BGA assembly 100 and the PCB 110 are exposed to the temperatures.The time-temperature exposure profile frequently includes time intervalsduring which the exposure temperature increases or decreases (“ramp”times) and time intervals during which a constant temperature ismaintained (“soak” times). Ramp times generally reduce thermally-inducedstresses while soak times permit the BGA assembly 100 and the PCB 110 toreach selected temperatures. Soldering the BGA assembly 100 to the PCB110 requires sufficient heating to reflow the solder balls 114 to forman electrical connection to the bond pads 140 the PCB 110. The rib 130may have a thickness slightly greater than the diameter of the solderballs 114. When the solder balls 140 reflow, the rib 130 eventuallycontacts the PCB 110, and acts as a stop which fixes the separation ofand maintains the planarity of the PCB 110 and the BGA assembly 100.This stop function is enhanced by positioning the rib about the entireperiphery of the substrate. However, the stop function may be achievedby the placement of a section of elongated rib on two or more sides ofthe perimeter of this substrate or by alternative rib placements. Forexample, a rib can be placed on an interior portion of the surface 109,so that the rib is within the array of solder balls 114.

[0031] The rib 130 permits long ramp times, long soak times, or relaxedcontrol of ramp and soak times because the rib 130 maintains theseparation of the BGA assembly 100 and the PCB 110 even if the solderballs 114 reflow excessively. By maintaining the separation of the BGA100 and the PCB 110, the rib 130 also maintains planarity between thesubstrate 104 and the PCB 110. In a conventional soldering process witha conventional BGA component, the time-temperature exposure profile mustbe carefully maintained or the BGA component and the PCB to which it isto be attached can contact, or lose planarity. The rib 130 overcomesthese problems.

[0032]FIG. 3 illustrates a BGA assembly 200, similar to the BGA assembly100 of FIG. 1. The BGA assembly 200 includes an encapsulant layer 250situated in the cavity 132 formed by the PCB 110 and the BGA assembly200. While the BGA assembly 100 of FIG. 1 encapsulates the edge 122 andperimeter portions of the substrate 104, the encapsulant layer 250 inFIG. 3 protects a portion 150 of the surface 109 that is exposed inFIG. 1. The encapsulant layer 250 is desirably provided after the BGAassembly 200 is soldered to the PCB 110, through access holes 260provided in the rib 130 to allow introduction of the encapsulant orthrough access holes 261, 262 in the substrate 104.

[0033] While the example BGA assemblies described above include solderballs, solder bumps or other solder shapes can be used. As used herein,solder bumps includes solder balls and solder in any other projectingshape, and solder refers to an electrically conducting material thatreflows when heated.

[0034] The rib 130 of the FIGS. 1-2 example may extend completely aroundthe perimeter region 128 of the substrate 104, but again, ribs thatextend along only selected parts of the perimeter region 128 can beprovided. For example, the rib 130 can extend along two sides of thesubstrate 104, or can include sections located at corners of thesubstrate. Alternative ribs can include one or more posts, pillars, orbumps. These posts, pillars, and bumps can be arranged individually orin an array, and positioned along the perimeter region or on an interiorregion of the surface 109 of the substrate 104. The ribs may be formedto overlap and encapsulate all or selected portions of the substrateedge 122.

[0035] A method of forming a package, such as the package 120, using amolding process is shown in FIG. 4. A semiconductor die 401 is bonded toa substrate 403, and wire bonds 405 are provided to electrically connectthe semiconductor die 401 to the substrate 403. The wire-bondedsemiconductor die 401 and the substrate 403 are placed between an uppermold half 407 and a lower mold half 409. The substrate 403 can be urgedtoward the lower mold half 409 using a vacuum applied through a vacuumport 415.

[0036] With the semiconductor die 401 and the substrate 403 positionedbetween the mold halves 407, 409, a resin or other encapsulatingmaterial is injected into a cavity 417 that defines a package cover anda cavity 419 that defines a rib. After injecting the resin, the resin iscured. The semiconductor die 401, the substrate 403, and the moldedpackage cover and rib may then be removed from the mold halves 407, 409.In this approach, the rib and package cover are formed as a single piece(i.e., the rib and the package cover are of a unitary one-pieceintegrated construction). Alternatively, the rib cavity 419 may beomitted from the lower mold half 409, and a package molded without arib. An additional molding step and an additional mold or molds can thenbe used to define the rib. In the FIG. 4 approach, the solder bumps maybe added to the undersurface of the substrate following molding.

[0037] BGA assemblies such as the BGA assemblies 100, 200 of FIGS. 1-3may also be produced in the form of a substrate strip 503, asillustrated in FIGS. 5A-5D. Semiconductor die 501 a-501 d are mounted(e.g., adhesively bonded) to one major surface of the substrate strip503 and wire bonds 507 are provided to electrically connect thesemiconductor die 501 a-501 d to conductor patterns defined by thesubstrate strip 503. FIGS. 5A-5D show four semiconductor die 501 a-501 dattached to the substrate strip 503, but a longer or shorter substratestrip can be used to mount more or fewer semiconductor die. Thesubstrate strip 503 includes tie bars 505 that connect substrateportions 504 a-504 d. After the semiconductor die 501 a-501 d areattached and wire bonded to the substrate strip 503, respective packagecovers 509 a-509 d and ribs 511 a-511 d may be formed, as by molding.The illustrated package covers 509 a-509 d encapsulate the semiconductordie 501 a-501 d, respectively. FIG. 5B is a sectional view illustratingthe packages 511 a-511 d and FIG. 5C is a sectional view illustratingthe package 511 d.

[0038] After the package covers 509 a-509 d and the ribs 511 a-51 Id areformed, solder bumps 514 may be formed on the substrate strip 503 asshown in FIG. 5D in a conventional manner. The substrate strip 503 isthen cut, sheared, or routed at the tie bars 505 along cut lines 508a-508 d so that the semiconductor die 501 a-501 d are attached torespective substrate portions 504 a-504 d and are available asindividual BGA assemblies.

[0039] As illustrated in FIG. 5B, the package covers 509 a-509 d andribs 511 a-511 d do not cover or encapsulate the entire substrate stripedges formed at respective cut lines 508 a-508 d after the substratestrip 503 is cut at the tie bars 505. Referring to FIG. 5C, opposedsubstrate edges 506 d are in this example encapsulated by the packagecover 509 d and the rib 511 d. Similarly, the package covers 509 a-509 cand the ribs 511 a-511 c encapsulate respective opposed edges 506 a-506c, enhancing the protection of the substrate portions 504 a-504 c frompenetration by moisture or other contaminants. In this illustratedembodiment even with the sheared edges of the substrate exposed, amajority of the substrate edge is encapsulated. The exposed shearededges of the substrate may also be encapsulated, if desired.

[0040] While the invention is described with respect to particularimplementations, the invention is not limited to these implementations.

We claim:
 1. A packaged semiconductor die, comprising: a substrate having a first major surface, a second major surface opposed to the first major surface, and a substrate edge extending between the first and second major surfaces, wherein the semiconductor die is mounted to the first major surface of the substrate; and an elongated rib that extends along at least a portion of the second major surface and which projects outwardly from the second major surface.
 2. The packaged semiconductor die of claim 1, further comprising at least one bond pad situated on the second major surface.
 3. The packaged semiconductor die of claim 1, further comprising: at least one solder bump projecting from the second major surface of the substrate.
 4. The packaged semiconductor die of claim 1, wherein the rib extends along at least a portion of a perimeter of the second major surface.
 5. The packaged semiconductor die of claim 1, wherein the rib is positioned to encapsulate at least a portion of the substrate edge.
 6. The packaged semiconductor die of claim 5, further comprising a package cover that encapsulates at least a portion of a perimeter of the first major surface of the substrate.
 7. The packaged semiconductor die of claim 1, further comprising a package cover that at least partially encapsulates the semiconductor die and at least a portion of a perimeter of the first major surface of the substrate.
 8. The packaged semiconductor die of claim 1, further comprising a package cover that encapsulates the semiconductor die and at least a portion of a perimeter of the first major surface of the substrate.
 9. The packaged semiconductor die of claim 8, further comprising at least one interconnect that electrically connects the semiconductor die to the substrate, and wherein the interconnect is encapsulated by the package cover.
 10. The packaged semiconductor die of claim 9, further comprising: at least one solder bump projecting from the second major surface of the substrate.
 11. An integrated circuit assembly, comprising: a semiconductor die; a substrate to which the semiconductor die is attached and electrically connected; a circuit board; solder bumps that electrically connect the circuit board to the substrate; and a package cover that encapsulates the die, at least a portion of an edge of the substrate, and includes a rib that extends into contact with the circuit board.
 12. A packaged die, comprising: a substrate having a first major surface to which the die is attached and a second major surface opposed to the first major surface; and a frame projecting outwardly from the second major surface, the frame surrounding a cavity bounded by the frame and the second major surface.
 13. The packaged die of claim 12, further comprising a package cover that encapsulates the die.
 14. The packaged die of claim 13, wherein the substrate has an edge extending between the first and second major surfaces, and wherein the frame encapsulates at least a majority of the edge of the substrate.
 15. The packaged die of claim 12 including a plurality of separated solder bumps coupled to the second major surface and positioned within the frame.
 16. The packaged die of claim 15 including encapsultant occupying the cavity between the solder bumps.
 17. A package for a die that is mounted to a substrate, comprising an elongated rib situated to extend from a surface of the substrate and to encapsulate at least a portion of an edge of the substrate.
 18. The package of claim 17, further comprising a package cover situated to encapsulate the die, the package cover being connected to the rib.
 19. The package of claim 18, wherein the rib and the package cover are of a unitary one-piece integral construction.
 20. A mold for molding a package for at least one die bonded to a substrate, the mold defining a package cover for encapsulating the die and a portion of a surface of the substrate to which the die is bonded, and a rib that extends from a surface of the substrate.
 21. The mold of claim 20, comprising first and second mold sections, the first and second mold sections defining the package cover and the rib so that at least a portion of the substrate edge is encapsulated by either the package cover or the rib, or both the package cover and the rib.
 22. The mold set of claim 21, wherein the upper mold and the lower mold define package covers and ribs for a plurality of die bonded to the substrate.
 23. A method of reducing moisture penetration into a circuit assembly, the circuit assembly including a substrate attached to a circuit board, comprising: covering at least a portion of an edge of the substrate with an encapsulant; and forming a rib that covers at least a portion of a first surface of the substrate and extends from a second surface of the substrate and contacts the circuit board.
 24. The method of claim 23, wherein the circuit assembly includes a die and further comprising covering the die with the encapsulant.
 25. The method of claim 23, wherein the rib is formed of the encapsulant.
 26. A method of soldering a substrate provided with solder bumps to a circuit board, the method comprising: contacting the circuit board with the solder bumps; heating the solder bumps so that the solder bumps reflow to connect to the circuit board; and providing a rib situated to maintain a separation between the substrate and the circuit board as the solder bumps reflow.
 27. The method of claim 26, wherein the rib is provided at at least a portion of a perimeter of the substrate.
 28. The method of claim 26, wherein the solder bumps are heated so that the rib contacts the circuit board and acts as a stop.
 29. The method of claim 28, further comprising bonding the rib to the circuit board.
 30. The method of claim 28, further comprising bonding the rib to the substrate.
 31. The method of claim 30, further comprising bonding the rib to the circuit board.
 32. The method of claim 26, further comprising encapsulating at least a portion of an edge of the substrate with the rib.
 33. A method of packaging a die, comprising: bonding the die to a first surface of a substrate; attaching one or more solder bumps to a second surface of the substrate; and providing an encapsulating layer that encapsulates the die and includes a rib that encapsulates at least a perimeter portion of the second surface of the substrate.
 34. The method of claim 33, wherein the encapsulating layer encapsulates at least a portion of the first surface of the substrate.
 35. The method of claim 34, further comprising defining the rib with a mold.
 36. The method of claim 33, wherein the rib has a thickness that is at least as large as a thickness of the solder bumps.
 37. A method of attaching a substrate to a circuit board, comprising: providing a rib that covers a perimeter portion of a surface of a substrate; and electrically connecting the substrate to the circuit board so that the separation of the substrate and the circuit board is defined by the rib.
 38. A method for attaching a ball grid array packaged die to a circuit board, comprising: providing a support band extending along at least a portion of a perimeter of a surface of the ball grid array packaged die; and heating the packaged device to reflow solder balls provided at the surface of the ball grid array packaged die.
 39. A method of making a package for a die mounted to a substrate, comprising: contacting a first surface of the substrate with a first mold; contacting the first mold with a second mold; and injecting an encapsulant into a cavity defined by the first mold and the second mold, wherein one of the first mold and the second mold define a cavity for a rib. 